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The cpusystem configure the CPU affinity for the service manager as well as the default CPU affinity for all forked off processes. Takes a list of CPU or ranges separated by either comma. CPU ranges are specified by the lower and the upper CPU indices separated by a dash (more details here).
By default in systemd, service and scope units are placed in the system slice, virtual machines and containers are found in the machine slice and user sessions in the user slice. The cpusystem, cpumachines and cpuuser are used to restrict the processes to be executed on specific CPUs in function of slices (more details here).
The project defines 3 others slices to separate the functionalities:
machine-nort: a subgroup of machine slice to run all virtual machines with default scheduler.machine-rt: a subgroup of machine slice to run all virtual machines with real-time scheduler.ovs: a group to run OpenVSwitch.
Interrupt Requests
irqbalance is a daemon for SMP (Symmetric shared-memory multiprocessing) systems to help balance the CPU load generated by interrupts across all of a systems CPUs. irqbalance identifies the highest volume interrupt sources, and isolates each of them to a single unique CPU, so that load is spread as much as possible over an entire processor set, while minimizing cache miss rates for irq handlers.
The irqmask define the environment variable IRQBALANCE_BANNED_CPUS. It sould ignore some CPU and never assign interrupts (more details here, the irqbalance manual). This variable is a mask where the first CPU is the least signifiant bit and specified CPUs in cpusystem should be set to 0. The workqueuemask is his negation and it's used to configure the kernel.
Example:
cpusystem | irqbalance | workqueuemask |
|---|---|---|
0,12 | ffeffe | 1001 |
Kernel configuration
The cluster is installed with a real-time kernel on each node. It must execute orders without delay. So, some CPUs should be isolated from the scheduler kernel with isolcpus kernel parameter.
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We can merge these syntax to specify some CPU and ranges of CPUs.
Control groups configuration
The project defines 2 control groups:
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